/*
 * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2022. All rights reserved.
 * Description: ws63 rf reg interface and struct adaption
 * Date: 2022-11-12
*/

#ifndef __FE_HAL_RF_ABB_REG_IF_ROM_H__
#define __FE_HAL_RF_ABB_REG_IF_ROM_H__
#include "osal_types.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif
osal_void hal_rf_set_abb0_d_top_rf_band_local(osal_u16 d_top_rf_band_local);
osal_u16 hal_rf_get_abb0_d_top_rf_band_local(osal_void);
osal_void hal_rf_set_abb0_d_wb_txlpf_bw_local(osal_u16 d_wb_txlpf_bw_local);
osal_u16 hal_rf_get_abb0_d_wb_txlpf_bw_local(osal_void);
osal_void hal_rf_set_abb0_d_wb_rxlpf_bw_local(osal_u16 d_wb_rxlpf_bw_local);
osal_u16 hal_rf_get_abb0_d_wb_rxlpf_bw_local(osal_void);
osal_void hal_rf_set_abb0_d_wb_temp_bank_sel_local(osal_u16 d_wb_temp_bank_sel_local);
osal_u16 hal_rf_get_abb0_d_wb_temp_bank_sel_local(osal_void);
osal_void hal_rf_set_abb0_d_wb_over_temp_prt_local(osal_u16 d_wb_over_temp_prt_local);
osal_u16 hal_rf_get_abb0_d_wb_over_temp_prt_local(osal_void);
osal_void hal_rf_set_abb1_d_wb_mode_sel_local(osal_u16 d_wb_mode_sel_local);
osal_u16 hal_rf_get_abb1_d_wb_mode_sel_local(osal_void);
osal_void hal_rf_set_abb1_d_wb_tx_en_local(osal_u16 d_wb_tx_en_local);
osal_u16 hal_rf_get_abb1_d_wb_tx_en_local(osal_void);
osal_void hal_rf_set_abb1_d_wb_ipa_en_local(osal_u16 d_wb_ipa_en_local);
osal_u16 hal_rf_get_abb1_d_wb_ipa_en_local(osal_void);
osal_void hal_rf_set_abb1_d_wb_rx_en_local(osal_u16 d_wb_rx_en_local);
osal_u16 hal_rf_get_abb1_d_wb_rx_en_local(osal_void);
osal_void hal_rf_set_abb1_d_wb_rx_radar_en_local(osal_u16 d_wb_rx_radar_en_local);
osal_u16 hal_rf_get_abb1_d_wb_rx_radar_en_local(osal_void);
osal_void hal_rf_set_abb1_d_wb_fb_en_local(osal_u16 d_wb_fb_en_local);
osal_u16 hal_rf_get_abb1_d_wb_fb_en_local(osal_void);
osal_void hal_rf_set_abb2_d_wb_ppa_code_local(osal_u16 d_wb_ppa_code_local);
osal_u16 hal_rf_get_abb2_d_wb_ppa_code_local(osal_void);
osal_void hal_rf_set_abb3_d_wb_pa_code_local(osal_u16 d_wb_pa_code_local);
osal_u16 hal_rf_get_abb3_d_wb_pa_code_local(osal_void);
osal_void hal_rf_set_abb3_d_wb_txlpf_gain_local(osal_u16 d_wb_txlpf_gain_local);
osal_u16 hal_rf_get_abb3_d_wb_txlpf_gain_local(osal_void);
osal_void hal_rf_set_abb3_d_wb_pa_bias_ctrl_local(osal_u16 d_wb_pa_bias_ctrl_local);
osal_u16 hal_rf_get_abb3_d_wb_pa_bias_ctrl_local(osal_void);
osal_void hal_rf_set_abb4_d_wb_fb_gain_local(osal_u16 d_wb_fb_gain_local);
osal_u16 hal_rf_get_abb4_d_wb_fb_gain_local(osal_void);
osal_void hal_rf_set_abb4_d_wb_fb_phase_local(osal_u16 d_wb_fb_phase_local);
osal_u16 hal_rf_get_abb4_d_wb_fb_phase_local(osal_void);
osal_void hal_rf_set_abb5_d_wb_lna_gain_local(osal_u16 d_wb_lna_gain_local);
osal_u16 hal_rf_get_abb5_d_wb_lna_gain_local(osal_void);
osal_void hal_rf_set_abb5_d_wb_rxlpf_gain_local(osal_u16 d_wb_rxlpf_gain_local);
osal_u16 hal_rf_get_abb5_d_wb_rxlpf_gain_local(osal_void);
osal_void hal_rf_set_abb5_d_wb_vga_gain_local(osal_u16 d_wb_vga_gain_local);
osal_u16 hal_rf_get_abb5_d_wb_vga_gain_local(osal_void);
osal_void hal_rf_set_abb6_d_wb_dcoc_i_local(osal_u16 d_wb_dcoc_i_local);
osal_u16 hal_rf_get_abb6_d_wb_dcoc_i_local(osal_void);
osal_void hal_rf_set_abb6_d_wb_dcoc_q_local(osal_u16 d_wb_dcoc_q_local);
osal_u16 hal_rf_get_abb6_d_wb_dcoc_q_local(osal_void);
osal_void hal_rf_set_abb7_d_top_rf_band_mode(osal_u16 d_top_rf_band_mode);
osal_u16 hal_rf_get_abb7_d_top_rf_band_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_mode_sel_mode(osal_u16 d_wb_mode_sel_mode);
osal_u16 hal_rf_get_abb7_d_wb_mode_sel_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_txlpf_bw_mode(osal_u16 d_wb_txlpf_bw_mode);
osal_u16 hal_rf_get_abb7_d_wb_txlpf_bw_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_rxlpf_bw_mode(osal_u16 d_wb_rxlpf_bw_mode);
osal_u16 hal_rf_get_abb7_d_wb_rxlpf_bw_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_ppa_code_mode(osal_u16 d_wb_ppa_code_mode);
osal_u16 hal_rf_get_abb7_d_wb_ppa_code_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_pa_code_mode(osal_u16 d_wb_pa_code_mode);
osal_u16 hal_rf_get_abb7_d_wb_pa_code_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_tx_en_mode(osal_u16 d_wb_tx_en_mode);
osal_u16 hal_rf_get_abb7_d_wb_tx_en_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_ipa_en_mode(osal_u16 d_wb_ipa_en_mode);
osal_u16 hal_rf_get_abb7_d_wb_ipa_en_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_rx_en_mode(osal_u16 d_wb_rx_en_mode);
osal_u16 hal_rf_get_abb7_d_wb_rx_en_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_fb_en_mode(osal_u16 d_wb_fb_en_mode);
osal_u16 hal_rf_get_abb7_d_wb_fb_en_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_pa_bias_ctrl_mode(osal_u16 d_wb_pa_bias_ctrl_mode);
osal_u16 hal_rf_get_abb7_d_wb_pa_bias_ctrl_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_txlpf_gain_mode(osal_u16 d_wb_txlpf_gain_mode);
osal_u16 hal_rf_get_abb7_d_wb_txlpf_gain_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_rxlpf_gain_mode(osal_u16 d_wb_rxlpf_gain_mode);
osal_u16 hal_rf_get_abb7_d_wb_rxlpf_gain_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_fb_gain_mode(osal_u16 d_wb_fb_gain_mode);
osal_u16 hal_rf_get_abb7_d_wb_fb_gain_mode(osal_void);
osal_void hal_rf_set_abb7_d_wb_fb_phase_mode(osal_u16 d_wb_fb_phase_mode);
osal_u16 hal_rf_get_abb7_d_wb_fb_phase_mode(osal_void);
osal_void hal_rf_set_abb8_d_wb_vga_gain_mode(osal_u16 d_wb_vga_gain_mode);
osal_u16 hal_rf_get_abb8_d_wb_vga_gain_mode(osal_void);
osal_void hal_rf_set_abb8_d_wb_lna_gain_mode(osal_u16 d_wb_lna_gain_mode);
osal_u16 hal_rf_get_abb8_d_wb_lna_gain_mode(osal_void);
osal_void hal_rf_set_abb8_d_wb_dcoc_i_mode(osal_u16 d_wb_dcoc_i_mode);
osal_u16 hal_rf_get_abb8_d_wb_dcoc_i_mode(osal_void);
osal_void hal_rf_set_abb8_d_wb_dcoc_q_mode(osal_u16 d_wb_dcoc_q_mode);
osal_u16 hal_rf_get_abb8_d_wb_dcoc_q_mode(osal_void);
osal_void hal_rf_set_abb8_d_wb_temp_bank_sel_mode(osal_u16 d_wb_temp_bank_sel_mode);
osal_u16 hal_rf_get_abb8_d_wb_temp_bank_sel_mode(osal_void);
osal_void hal_rf_set_abb8_d_wb_over_temp_prt_mode(osal_u16 d_wb_over_temp_prt_mode);
osal_u16 hal_rf_get_abb8_d_wb_over_temp_prt_mode(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_logen_ssb_en(osal_u16 d_wb_rf_logen_ssb_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_logen_ssb_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_logen_lobuf_lo2tx_en(osal_u16 d_wb_rf_logen_lobuf_lo2tx_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_logen_lobuf_lo2tx_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_logen_lobuf_lo2rx_en(osal_u16 d_wb_rf_logen_lobuf_lo2rx_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_logen_lobuf_lo2rx_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_logen_ssb_vdet_en(osal_u16 d_wb_rf_logen_ssb_vdet_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_logen_ssb_vdet_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_logen_lownoise_en_to_ls(osal_u16 d_wb_rf_logen_lownoise_en_to_ls);
osal_u16 hal_rf_get_abb9_d_wb_rf_logen_lownoise_en_to_ls(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_ibg_pa_en(osal_u16 d_wb_rf_tx_ibg_pa_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_ibg_pa_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_ibg_ppa_en(osal_u16 d_wb_rf_tx_ibg_ppa_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_ibg_ppa_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_iptat_pa_en(osal_u16 d_wb_rf_tx_iptat_pa_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_iptat_pa_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_iptat_ppa_en(osal_u16 d_wb_rf_tx_iptat_ppa_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_iptat_ppa_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_pa_en(osal_u16 d_wb_rf_tx_pa_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_pa_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_pa_bias_en(osal_u16 d_wb_rf_tx_pa_bias_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_pa_bias_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_ppa_en(osal_u16 d_wb_rf_tx_ppa_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_ppa_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_ppa_bias_en(osal_u16 d_wb_rf_tx_ppa_bias_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_ppa_bias_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_upc_en(osal_u16 d_wb_rf_tx_upc_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_upc_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_pa_adb_en(osal_u16 d_wb_rf_tx_pa_adb_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_pa_adb_en(osal_void);
osal_void hal_rf_set_abb9_d_wb_rf_tx_lodiv_en(osal_u16 d_wb_rf_tx_lodiv_en);
osal_u16 hal_rf_get_abb9_d_wb_rf_tx_lodiv_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_lna_en(osal_u16 d_wb_rf_rx_lna_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_lna_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_lna_buf_en(osal_u16 d_wb_rf_rx_lna_buf_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_lna_buf_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_lna_sw_ao_en(osal_u16 d_wb_rf_rx_lna_sw_ao_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_lna_sw_ao_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_bias_ao_en(osal_u16 d_wb_rf_rx_bias_ao_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_bias_ao_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_trx_trxsw_en(osal_u16 d_wb_rf_trx_trxsw_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_trx_trxsw_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_trx_iqcal_en(osal_u16 d_wb_rf_trx_iqcal_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_trx_iqcal_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_lodiv_en(osal_u16 d_wb_rf_rx_lodiv_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_lodiv_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_lobias_en(osal_u16 d_wb_rf_rx_lobias_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_lobias_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_rx_tia_en(osal_u16 d_wb_rf_rx_tia_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_rx_tia_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_trx_iqcal_ibias_en(osal_u16 d_wb_rf_trx_iqcal_ibias_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_trx_iqcal_ibias_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_rf_trx_iqcal_buf_en(osal_u16 d_wb_rf_trx_iqcal_buf_en);
osal_u16 hal_rf_get_abb10_d_wb_rf_trx_iqcal_buf_en(osal_void);
osal_void hal_rf_set_abb10_d_wl_pa_vdet_en(osal_u16 d_wl_pa_vdet_en);
osal_u16 hal_rf_get_abb10_d_wl_pa_vdet_en(osal_void);
osal_void hal_rf_set_abb10_d_wl_ppa_vdet_en(osal_u16 d_wl_ppa_vdet_en);
osal_u16 hal_rf_get_abb10_d_wl_ppa_vdet_en(osal_void);
osal_void hal_rf_set_abb10_d_wb_pd_buf_dcoc_cal_en_i_to_ls(osal_u16 d_wb_pd_buf_dcoc_cal_en_i_to_ls);
osal_u16 hal_rf_get_abb10_d_wb_pd_buf_dcoc_cal_en_i_to_ls(osal_void);
osal_void hal_rf_set_abb10_d_wb_pd_buf_dcoc_cal_en_q_to_ls(osal_u16 d_wb_pd_buf_dcoc_cal_en_q_to_ls);
osal_u16 hal_rf_get_abb10_d_wb_pd_buf_dcoc_cal_en_q_to_ls(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_abb_bias_en(osal_u16 d_wb_rfabb_abb_bias_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_abb_bias_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_tx_filter_en(osal_u16 d_wb_rfabb_tx_filter_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_tx_filter_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_tx_lpf_dccal_i_en(osal_u16 d_wb_rfabb_tx_lpf_dccal_i_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_tx_lpf_dccal_i_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_tx_lpf_dccal_q_en(osal_u16 d_wb_rfabb_tx_lpf_dccal_q_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_tx_lpf_dccal_q_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_rx_filter_en(osal_u16 d_wb_rfabb_rx_filter_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_rx_filter_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_rx_vga_i_en(osal_u16 d_wb_rfabb_rx_vga_i_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_rx_vga_i_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_rx_vga_q_en(osal_u16 d_wb_rfabb_rx_vga_q_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_rx_vga_q_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_rx_dcoc_en(osal_u16 d_wb_rfabb_rx_dcoc_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_rx_dcoc_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_pdet_dcoc_mode(osal_u16 d_wb_rfabb_pdet_dcoc_mode);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_pdet_dcoc_mode(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_tx_tia_en(osal_u16 d_wb_rfabb_tx_tia_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_tx_tia_en(osal_void);
osal_void hal_rf_set_abb11_d_wb_rfabb_pdbuf_en(osal_u16 d_wb_rfabb_pdbuf_en);
osal_u16 hal_rf_get_abb11_d_wb_rfabb_pdbuf_en(osal_void);
osal_void hal_rf_set_abb15_d_wb_adc_ctrl0(osal_u16 d_wb_adc_ctrl0);
osal_u16 hal_rf_get_abb15_d_wb_adc_ctrl0(osal_void);
osal_void hal_rf_set_abb17_d_wb_dac_ctrl0(osal_u16 d_wb_dac_ctrl0);
osal_u16 hal_rf_get_abb17_d_wb_dac_ctrl0(osal_void);
osal_void hal_rf_set_abb19_d_wb_tst_sw_ctrl1(osal_u16 d_wb_tst_sw_ctrl1);
osal_u16 hal_rf_get_abb19_d_wb_tst_sw_ctrl1(osal_void);
osal_void hal_rf_set_abb20_d_wl_tx_rc_code_0(osal_u16 d_wl_tx_rc_code_0);
osal_u16 hal_rf_get_abb20_d_wl_tx_rc_code_0(osal_void);
osal_void hal_rf_set_abb20_d_wl_tx_rc_code_1(osal_u16 d_wl_tx_rc_code_1);
osal_u16 hal_rf_get_abb20_d_wl_tx_rc_code_1(osal_void);
osal_void hal_rf_set_abb21_d_wl_rx_rc_code_0(osal_u16 d_wl_rx_rc_code_0);
osal_u16 hal_rf_get_abb21_d_wl_rx_rc_code_0(osal_void);
osal_void hal_rf_set_abb21_d_wl_rx_rc_code_1(osal_u16 d_wl_rx_rc_code_1);
osal_u16 hal_rf_get_abb21_d_wl_rx_rc_code_1(osal_void);
osal_void hal_rf_set_abb24_d_wl_rf_rx_c_code(osal_u16 d_wl_rf_rx_c_code);
osal_u16 hal_rf_get_abb24_d_wl_rf_rx_c_code(osal_void);
osal_void hal_rf_set_abb24_d_wl_rf_rx_r_code(osal_u16 d_wl_rf_rx_r_code);
osal_u16 hal_rf_get_abb24_d_wl_rf_rx_r_code(osal_void);
osal_void hal_rf_set_abb25_d_wb_rf_trx_iqcal_rccode_to_ls(osal_u16 d_wb_rf_trx_iqcal_rccode_to_ls);
osal_u16 hal_rf_get_abb25_d_wb_rf_trx_iqcal_rccode_to_ls(osal_void);
osal_void hal_rf_set_abb25_d_wb_rf_trx_iqcal_cscode_to_ls(osal_u16 d_wb_rf_trx_iqcal_cscode_to_ls);
osal_u16 hal_rf_get_abb25_d_wb_rf_trx_iqcal_cscode_to_ls(osal_void);
osal_void hal_rf_set_abb25_d_wb_rf_trx_iqcal_cpcode_to_ls(osal_u16 d_wb_rf_trx_iqcal_cpcode_to_ls);
osal_u16 hal_rf_get_abb25_d_wb_rf_trx_iqcal_cpcode_to_ls(osal_void);
osal_void hal_rf_set_abb51_d_wb_rf_logen_ssb_tune_b0_lut(osal_u16 d_wb_rf_logen_ssb_tune_b0_lut);
osal_u16 hal_rf_get_abb51_d_wb_rf_logen_ssb_tune_b0_lut(osal_void);
osal_void hal_rf_set_abb51_d_wb_rf_logen_ssb_tune_b1_lut(osal_u16 d_wb_rf_logen_ssb_tune_b1_lut);
osal_u16 hal_rf_get_abb51_d_wb_rf_logen_ssb_tune_b1_lut(osal_void);
osal_void hal_rf_set_abb51_d_wb_rf_logen_ssb_tune_b2_lut(osal_u16 d_wb_rf_logen_ssb_tune_b2_lut);
osal_u16 hal_rf_get_abb51_d_wb_rf_logen_ssb_tune_b2_lut(osal_void);
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif
#endif /* end of __FE_HAL_RF_ABB_REG_IF_ROM_H__ */
